We have developed the "SIMIT Nb03P" fabrication technique for superconducting integrated circuits with Nb-based Josephson junctions based on the validated "SIMIT Nb03" process. The standard fabrication process with 12 mask levels has 5 metal layers including 4 niobium superconducting layers and a Mo resistor layer. The influences of deposition parameters on film stress, electrical properties and surface roughness were studied systematically by an optical film-stress mapping system, a Physical Property Measurement System (PPMS) system, and an Atomic Force Microscope (AFM). As a result, high quality Nb, Al, Mo and SiO2 films were successfully obtained for the subsequent fabrication. The circuit fabrication starts with fabrication of Mo resistors with a target sheet resistance Rsh of 2 ohm, followed by deposition of Nb/Al-AlOx/Nb Joseohson-junction trilayer with a target critical current density Jc of 6 kA/cm2. To assess the process dependability and controllability, a set of process control monitors (PCMs) for monitoring fabrication and design parameters was designed and monitored. Up to now, several small-scale circuits have been fabricated and successfully tested at low frequencies. The typical experimental operating margins for the bias current were found to be similar to “SIMIT Nb03” process. As a result, it is demonstrated that the superconducting large scaleintegrated digital circuits can be produced using our innovative technique, "SIMIT Nb03P."