A Josephson comparator (JC), consisting of a pair of Josephson junctions, is a fundamental element in superconducting circuits and plays a key role in superconducting logic gates. It is also widely used in applications such as A/D conversion, high-speed random number generation, and probabilistic computation. In general, JCs exhibit a trade-off between operating speed and gray zone width. Notably, when the output probability is 0.5, the decision time increases, degrading the operating frequency of systems such as stochastic arithmetic circuits and Bayesian networks.
To prevent simultaneous switching (double-switching) in conventional JCs, the bias current must be reduced, or the preceding circuit’s drive capability must be weakened. We propose a novel JC operation that intentionally utilizes double-switching to produce a ‘1’ output, allowing operation with higher drive power and increased bias current. The issue of backward signal flow is mitigated by adding an escape junction.
We optimized JC parameters to ensure double-switching occurs with a 100% probability for a ‘1’ output. Simulations incorporating thermal noise show that the proposed operation reduces decision time by about 50% and narrows its distribution. The operating speed of a Bayesian network using JCs can be increased from 33 GHz to 54 GHz, assuming a 10 kA/cm² Nb superconducting fabrication process.