JSIC-EDA: a Design & Verification System for Superconductor Integrated Circuits
2025-06-16 , Room "Berlin & Oslo"

Scaling up superconducting integrated circuits (SIC) represents a pivotal challenge in the field. Addressing this challenge necessitates a concerted effort across fabrication, design, and measurement teams. The development of Electronic Design Automation (EDA) tools is integral to this collaborative endeavor. These tools are essential for integrating new models and findings into the chip development process. Furthermore, EDA tools are invaluable for analyzing experimental data, thereby enhancing our understanding of circuit behaviors and facilitating more informed design improvements. Here, we present the JSIC-EDA system, a specialized suite of EDA tools developed for single flux quantum (SFQ) SIC designed to facilitate the scaling of on-site circuit development. The JSIC-EDA system integrates a 3D superconductor process model and a process design kit (PDK) database with state-of-the-art device timing, logic, and physical models, supporting comprehensive automated design processes for design and analysis on processes such as SIMIT-Nb03, SIMIT-Nb03P, SIMIT-Nb04, and other developing 3D processes. Ongoing development efforts are focused on creating new EDA algorithmic tools based on the JSIC-EDA system, aiming to further advance the design, analysis, and testing automation of superconducting integrated circuits as well as pioneering neuromorphic computing technologies.


Affiliation:

Shanghai institute of microsystem and information technology (SIMIT), Chinese Academy of Science (CAS)

Additional Authors with Affiliation:

Shucheng Yang (Shanghai institute of microsystem and information technology (SIMIT), Chinese Academy of Science (CAS) )