We report the development of extremely low-power single-flux-quantum (SFQ) circuits toward digital signal processing near superconductor quantum bits. We fabricated the SFQ circuits using a lowered critical current density process (250 A/cm2) and low-voltage design (0.1 – 0.5 mV). We reduced the power consumption to 1/50 or 1/250 of the conventional SFQ circuits operating at 4.2 K. So far, we have designed several basic SFQ cells, including wiring elements, flip-flops, and logic gates with the four Nb planarized layer process and obtained the correct operation at low-frequency measurement at 0.3 K. In this work, we tested several SFQ circuits aiming to evaluate the operation at the mixing chamber stage of a dilution refrigerator. We successfully demonstrated the low-frequency operation of the standard cells and demultiplexer circuits with reasonable bias margins at 14 mK. We are currently working on the monolithic integration of the SFQ demultiplexer and multiple qubits as a simple example of cryogenic digital control of qubits.
This work was supported by JST Moonshot R&D Program Grant Number JPMJMS2067 and by VDEC of the University of Tokyo in collaboration with Cadence Design Systems, Inc. The test chips were fabricated at AIST Qufab.