Energy-efficient Rapid Single-Flux-Quantum (ERSFQ) circuits, combining low power consumption with high-frequency operation, present a promising solution for next-generation energy-efficient neuromorphic systems and high-performance computing. These circuits feature three distinct operational states: ERSFQ (with zero static power consumption), MIDSFQ, and RESFQ, with combined bias margins comparable to conventional RSFQ circuits. However, the practical implementation of ERSFQ technology has been constrained by the narrow bias margin of the ERSFQ state. To overcome this limitation, we present two novel optimization strategies: (1) a comprehensive analysis of the current compensation mechanism in feeding Josephson transmission lines (FJTLs), coupled with the development of a pulse-feeding technique that extends the lower margin boundary during measurement; and (2) an optimization protocol involving bias inductance adjustment and FJTL bias junction elimination to expand the upper margin boundary. Through the implementation of these methods on an 8-bit ERSFQ shift register, we achieved a substantial expansion of the ERSFQ state bias range from [94%, 100%] to [56%, 118%], representing a 930% improvement in bias margin. This research effectively addresses the challenge of limited bias margin in ERSFQ circuits, providing a more robust ERSFQ technology for future applications in neural networks and high-performance computing.